In wireless communication systems data may be transmitted between the transmitting and receiving stations over an air interface. The data may be transferred in data entities referred to as burst. Several stations may be enabled to transmit bursts over a single transportation channel. In order to enable this the bursts are multiplexed by means of an appropriate multiplexing technique before being output from a transmitter part of a station.
For example, in the GSM (Global System for Mobile communication) eight mobile stations may communicate over the same frequency by means of time division multiplexing (TDM). The length of a burst corresponds to a TDM time slot. With the TDM, eight time slots are carried by a single GSM frequency channel. Several station may use the same time slot but on different frequency channels. The GSM uses time division multiple access (TDMA) technique for allocating the time slots for different transmissions.
When a radio frequency (RF) signal is received at a receiver the signal needs typically to be down-converted from the radio frequency to baseband frequency. In a direct conversion receiver the radio frequency signal is converted directly to a baseband signal without converting the incoming signal first to one or several intermediate frequencies. Hence the direct conversion receivers are sometimes referred to as zero intermediate frequency receivers.
In a typical multi-frequency band and multi-system direct conversion receiver a radio frequency (RF) signal obtained from antenna means is conducted through band splitter means to split the signal in appropriate frequency bands. In each of the frequency bands the signal is conducted through a band filter. The signal in each of the frequency bands may also be amplified by appropriate pre-amplifier means. A gain control function (e.g. a low noise amplifier (LNA) gain control) can be used for controlling the level of the gain. If the own received signal is substantially strong, the one or more of the amplifiers may be switched to a smaller amplification level at the amplification (RF gain) step.
The amplified RF signal in each of the frequency bands is then typically demodulated or mixed to baseband in-phase (I) and quadrature (Q) signals by band mixer means. In a typical arrangement only one band of the plurality of bands is active at the same time. Said band mixer means (e.g. I/Q demodulator) typically comprise a mixer pair, one for the 0 degree and one for the 90 degree phase shift. The demodulation functions may be accomplished based on a local oscillator signal. The oscillator signal may be received from a synthesiser. It is also possible to combine the RF signals before the mixer means, e.g. by means of collector loads of the preceding amplification stage. In this case only one mixer pair is needed.
The mixer pairs typically share a common collector load. That is, all mixers of the I band share a common collector load and all mixers of the Q band share a common collector load. Thus the I and Q signals in all bands are transported after the demodulation step on respective common I and Q signal paths or channels. A resistor load may be used at the collector such that a capacitor is connected in parallel with the resistor to attenuate any strong signals that exist outside the channel. This is done in order to prevent the strong signals to interfere with the “own” signal on the path.
It is noted that in this specification the term “own” refers to a signal, burst, channel and so on that is intended to be received and/or processed by the particular receiver components under consideration.
After the demodulation the signal is amplified and possibly low-pass filtered to attenuate further the out-of-channel signals before the signal is input in an active channel filter. The gain is required in order to enable use of substantially high impedance levels in the channel filter without worsening the noise performance of the receiver.
With high impedance levels it is possible to use small, integrated capacitors. This enables integration of the channel filter with other components of the receiver. The channel filter may also be made programmable whereby it is possible to use the same channel filter for signals of different communication systems.
Automatic gain control (AGC) and removal i.e. compensation of direct voltage (DC compensation) are carried out after the channel filtering. After the AGC and direct voltage reduction functions the I and Q signals are fed to an analogue to digital (A/D) converter and processed with digital signal processing means so that the sound or data represented by the transmitted signal can be reproduced.
The direct conversion receiver employs no intermediate frequency stages and thus the design thereof requires substantially few components. This allows a substantially simple overall construction of the receiver and makes it thus advantageous in many applications.
In mobile stations such as mobile telephones direct conversion receivers are, however, only rarely used. The prior known direct conversion methods are considered as almost impossible to implement if the mobile stations are to be manufactured in an industrial scale. In addition, the known direct conversion solutions are not capable of addressing the unique features and specific problems of digital mobile telecommunication systems. This is so for several reasons.
A problem that is faced when implementing a direct conversion receiver is the control of offset voltages. The term “offset voltage” (or direct conversion offset error) refers to an error voltage which has become summed up in the receiver into the signal as an essentially direct voltage. The inclusion of the offset voltage in the received useful signal should, however, be avoided.
One general problem with the offset voltage is that the offset voltage may become summed up into baseband signals. This can happen, for example, in I/Q receivers which are generally used in mobile communications or in any other receiver in which a baseband in-phase signal (I) and quadrature signal (Q) are formed. This is a particular problem in the direct conversion receivers where the received RF signal is converted directly to a baseband that extends to near the zero frequency. The offset voltage may be considerably higher than what the pre-stage noise is. In such a case the signal-to-noise ratio may deteriorate substantially much.
The formation of the offset voltage can be caused by many different factors. The offsets caused by the mixer stage and the amplifier stages may cause the error. The local oscillators may leak to the RF stages and/or the input of the mixer. In this case the leak may become mixed with itself thereby forming a DC (direct current) signal at the output of the mixer.
The local oscillator may itself become linked to the front of the receiver (that is to high or radio frequency parts of the receiver) in which case the local oscillator signal obtains access to the radio frequency port of the I/Q demodulator. Thus the linked local oscillator signal becomes mixed with the actual signal from the local oscillator entering the local oscillator port thereby forming an offset signal (DC voltage) at the output of the mixer (so called self mixing).
At a receiver using intermediate frequency, the second local oscillator signal can itself become linked to the first local oscillator signal. In this case the signals get mixed with each other in the first mixer and as a result they form a mixing result which impacts on the intermediate frequency and generates offset voltage at the output of the I/Q demodulator.
In addition, a strong RF signal in any frequency at the input side of a mixer may leak also to a local oscillator branch, whereby a similar self-mixing occurs as in the above with the oscillator signal. The harmonic frequency of a clock oscillator which impacts on the channel frequency can also become mixed with the local oscillator signal and form a direct voltage at the output of the mixers in the I/Q demodulator. In addition, offset voltage can be generated in the baseband signals from switching on the supply voltages of the receiver.
The skilled person is aware of the phenomena leading to generation of offset voltage, and this is thus not described in more detail herein.
Several methods are known for mitigating i.e. removing the offset voltage. For example, if the offset voltage could be kept constant during the entire reception time, it might be possible to remove the offset voltage digitally. However, it is difficult to maintain a constant offset voltage. Even if a constant offset voltage is obtained, then the dynamics of the analogue/digital (A/D) converter should be extended by the highest possible offset voltage. This may make the A/D converters too expensive for some applications. In addition, any additional digital signal processing would require higher clock frequencies. This may lead, in turn, to increased current consumption. Publication WO 97/29551 and especially FIG. 2 thereof discloses a simple circuitry for the removal of the DC offset voltage and thus the error in the DC. Publication WO 97/29552, and especially FIGS. 5 and 6 thereof, discloses another prior art circuitry for the removal of the DC offset voltage. The present application shows said FIGS. 5 and 6 as FIGS. 1A and 1B, respectively. These prior art DC removal arrangements employ one stage RC low-pass filtering in the DC removal branch.
The DC removal arrangement is typically such that the receiver switches between DC removal and reception modes based on a time constant. The time constant defines the timing before the beginning of a burst when the DC compensation should be started. For example, some components may be arranged to start the DC removal operation 100 μs before the beginning of an own burst.
For example, in FIG. 1A the removal branch capacitors C2 and C3 are loaded through several resistors R5 to R7. By means of this is possible to prevent substantial loading of the high frequency signals into the DC removal capacitors C2 and C3. At the end of the DC removal period a desired amplification is switched on by means of automatic gain control (AGC) switches.
Since the FIG. 1A circuitry is only capable of keeping the DC voltage in the same level as what the voltage was on line Vq2 when input to the circuitry a second DC removal circuitry (DCN2) is required. Possible circuitry for the second removal circuitry is shown in FIG. 1B. In the second DC removal circuitry a further capacitor component C61 is loaded with a reference voltage Vref during the DC removal. A possible AC voltage component is kept in the same voltage level and phase at both ends of the capacitor C61 by means of a high-pass filter 64 and an adder 65.
The above discussed arrangement may enable a sufficient DC removal for a communication system such as the GSM (Global System for Mobile communications) without requirement for e.g. a software controlled DC removal operated in a burst by burst manner. However, in order to enable a sufficiently quick DC removal the time constant that is used for the control of the DC removal periods has to be selected to be substantially low. Thus the attenuation of the own signal is not substantially high. Because of this a small error may remain in the capacitors C2 and C3.
In addition, so called tail bits exist in the beginning and end of each transmission burst. These tail bits introduce modulating frequencies to the signal. For example, in the GSM mode the modulating frequency of tail bits is about 67 kHz. In the EDGE mode (Enhanced Data Rate for GSM Evolution) the modulating frequency of the tail bits is about 55 kHz.
The tail bit frequencies cause an error voltage at the beginning of the burst. This is illustrated by FIG. 2A in which a small DC error can be seen in the beginning of a received burst. FIG. 2B illustrates the variations that are caused by the tail bits to the DC present in the DC removal capacitor. In the prior art this error has been compensated at the amplification stage in a speed that is defined by the time constant so that this initial error becomes removed towards the end of the burst.
If it could be possible to use a high RF gain and to prevent the local oscillator to leak into the input of the RF amplifier, the proportion of the offset voltage generated by the mixer could probably be kept in a substantially low level in the useful signal. However, in order to ensure a high dynamic range the RF gain has to be kept substantially low, otherwise the amplifier and/or the mixer could become blocked because of the high signal levels. Thus most of the amplification has to be done after the mixer (which acts in the direct conversion as a detector) and the subsequent channel filter in order to obtain the required signal levels at the A/D converter. However, this amplification will also amplify the DC offset voltage.
The above referenced DC errors may have substantially higher values than what the useful signal obtained from the detector has whenever the signal is at the sensitivity limit of the detector. Thus, in order to amplify the useful signal and to keep at the same time the DC level in a desirable value a DC compensation of the signal is required.
It may be desired to make the time constant smaller in order to decrease the current consumption. Smaller time constant might also enable faster monitoring of the neighbours and multi-slot type operation of the receiver. However, a smaller time constant causes an increase in the DC error, especially in the DC error that is caused by the own signal. In addition, some of the proposed new modulation techniques, such as the EDGE (Enhanced Data Rate for GSM Evolution) modulation are substantially more sensitive for errors. Thus a faster and more efficient DC removal is required for use in the applications employing these techniques.